| 00:20.37 | CIA-23 | BRL-CAD: 03cprecup * r51444 10/brlcad/trunk/src/libged/dag.cpp: |
| 00:20.37 | CIA-23 | BRL-CAD: Replaced the bu_ptbl tables with bu_hash_tables for the solid, group and region |
| 00:20.37 | CIA-23 | BRL-CAD: types of objects in a database. Added id's to each object and shapes of the |
| 00:20.37 | CIA-23 | BRL-CAD: router. All these were used for avoiding node duplications within the |
| 00:20.37 | CIA-23 | BRL-CAD: representation of a database as a graph. |
| 00:44.37 | CIA-23 | BRL-CAD: 03Al Da Best 07http://brlcad.org * r4117 10/wiki/User:Al_Da_Best/devlog: Progress updates |
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| 03:30.35 | brlcad | andrei_: I don't understand that graph .. 2e-05 for size? shouldn't x just be 2-94? and I'd expect the speed to *increase* as the packet size increases |
| 04:14.45 | andrei_ | hello |
| 04:14.53 | andrei_ | it s at 230 or something right now |
| 04:15.25 | andrei_ | regarding the graphic, there probably is a mistake in what I did because judging by the numbers |
| 04:15.37 | andrei_ | the time decreases |
| 04:15.40 | andrei_ | => speed increase |
| 04:15.51 | andrei_ | I ll take another graphic in a few hours |
| 04:23.09 | brlcad | andrei_: I think just directly graphing time instead of speed will be more useful, particularly when you start adding input size as the Y and time becomes the vertical Z axis |
| 04:24.10 | brlcad | and keep your logs handy, we may want to run some other analyses |
| 04:24.58 | andrei_ | ah, yes. Sorry ! |
| 04:36.17 | CIA-23 | BRL-CAD: 03Popescu.andrei1991 07http://brlcad.org * r4118 10/wiki/User:Popescu.andrei1991: /* GsoC 2012 progress */ |
| 04:37.12 | CIA-23 | BRL-CAD: 03Popescu.andrei1991 07http://brlcad.org * r4119 10/wiki/User:Popescu.andrei1991: /* Relevant data */ |
| 04:41.46 | andrei_ | for package size 220 the time consumed sending is approximatively 10 seconds |
| 04:42.17 | andrei_ | for 2 it is like 230, I m expecting the script to become faster soon |
| 04:46.08 | CIA-23 | BRL-CAD: 03Popescu.andrei1991 07http://brlcad.org * r4120 10/wiki/User:Popescu.andrei1991: /* Daily development log */ |
| 04:46.52 | andrei_ | brlcad, should I split my development log on Weeks? |
| 04:47.19 | brlcad | you could, but not necessary |
| 04:47.53 | andrei_ | it seems easier to read and track that way. |
| 04:49.30 | brlcad | okay |
| 04:49.39 | brlcad | after reading a bunch, either works :) |
| 04:52.52 | CIA-23 | BRL-CAD: 03Popescu.andrei1991 07http://brlcad.org * r4121 10/wiki/User:Popescu.andrei1991: /* Daily development log */ |
| 04:54.44 | andrei_ | fixed the log. What should I do while I wait for the script to finish? I could start running the other tests, not sure if they can affect it. |
| 04:55.03 | brlcad | they should affect it so I wouldn't |
| 04:55.14 | brlcad | just let it run |
| 04:55.18 | andrei_ | or I could look into the unit test I wrote for tpkg, there are some issues with it |
| 04:55.54 | brlcad | could write unit tests for libpkg (pkg.c) |
| 04:56.02 | andrei_ | I did |
| 04:56.10 | brlcad | all functions? |
| 04:56.30 | andrei_ | no, I wrote a unit test that checks if a file sent is received correctly. |
| 04:57.22 | brlcad | that's not a unit test :) |
| 04:58.00 | brlcad | a unit test inspects a single function to see if it works, ideally testing all possible valid and invalid inputs |
| 04:58.44 | brlcad | usually with minimal calls to other functions to set things up for testing |
| 04:58.52 | andrei_ | ah, then I ll work on them on a separate machine. |
| 04:59.21 | andrei_ | thanks for all the help so far :) |
| 04:59.31 | brlcad | if you've never written such a beast before, I suggest picking just one function and greating a test for it |
| 04:59.40 | brlcad | some examples in src/libbu/test_*.c |
| 05:00.25 | andrei_ | I did write the test_rbtree, but I ll look there too. |
| 05:00.50 | brlcad | that's right -- that actually looked pretty good iirc |
| 05:01.10 | brlcad | gotta run, ttyl |
| 05:01.25 | andrei_ | see you around |
| 08:47.37 | CIA-23 | BRL-CAD: 03phoenixyjll * r51445 10/brlcad/trunk/src/librt/ (4 files in 3 dirs): Add b-rep conversion function to hf: hf -> dsp -> brep. |
| 08:47.50 | CIA-23 | BRL-CAD: 03Phoenix 07http://brlcad.org * r4122 10/wiki/User:Phoenix/GSoc2012/Reports: /* Week 7 */ |
| 08:48.09 | CIA-23 | BRL-CAD: 03Phoenix 07http://brlcad.org * r4123 10/wiki/User:Phoenix/GSoc2012/Reports: /* Week 8 */ |
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| 14:14.46 | CIA-23 | BRL-CAD: 03Anuragmurty 07http://brlcad.org * r4124 10/wiki/User:Anuragmurty: /* Development Log */ |
| 15:53.00 | petaflot | brlcad: here's a file http://vpaste.net/ib4a9 |
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