IRC log for #edev on 20070504

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17:46.08LyosNorezel2anyone here ever worked with the IDE interface?
17:46.21CosmicPenguinI use console editors
17:46.30LyosNorezel2erm...
17:46.52LyosNorezel2the hardware interface called "IDE"
17:47.04baird:)
17:47.14CosmicPenguinDon't get pissy with me
17:47.14LyosNorezel2also known as ATA/ATAPI
17:48.27ds2a.k.a ISA lite
17:48.33LyosNorezel2heh
17:49.01LyosNorezel2is it 5v signaling? or is it 3.3v signaling?
17:49.11ds2AFAIK, 5V
17:49.25LyosNorezel2hrm
17:50.45LyosNorezel2that makes my 3.3V FPGA a real PITA to use in a IDE device
17:51.12ds2what kind of device?
17:51.52LyosNorezel2ds2: actually I'm working on a few devices... both for tapes... but one is VHS and the other is cassette
17:52.11ds2oh
17:52.37ds2couldn't use some kind of 74XXXxxx to translate?
17:52.41LyosNorezel2if I get it right... I should be able to use the speed of IDE to transfer VHS tapes of 2+ hours in less than 10minutes
17:53.48LyosNorezel2ds2: 74XXXxxx?? do they make one that translates 5V signaling to 3.3v?
17:55.36ds2yes they do
17:55.37Crofton__I thought the Xilinx parts where very tolerant of different input types
17:55.51prpplagueLyosNorezel2: the 74HC series does a whole lot of different level shifts
17:56.01ds2for signals toward your FPGA, HCT should work
17:56.18ds2it is toward the device or bidirectional that you need to look it up
17:56.38ds2bah the reverse
17:56.51ds2HCT has thresholds that match 3.3V CMOS
17:56.54LyosNorezel2hmmm... it's gonna have to be bidirectional
17:57.25ds2there is a 24x chip that will do bi direct.
17:58.08LyosNorezel2hmmm... looks like 74LCX245 would work
18:00.46MonMothaa 74VHC254 should work on the data bus since IIRC IDE calls for TTL thresholds
18:00.51MonMothaer 245
18:01.03MonMotharun the chip off 3.3V, and it is tolerant of 5V inputs (and will output a full 3.3)
18:01.51LyosNorezel2MonMotha: will it send 5V back to the bus?
18:01.56MonMothaif you need full 5V output levels, you could use a couple of 541s, one running off the 3.3 rail and the other at 5
18:02.23MonMothaLyosNorezel: it will only ever output a 3.3V high (though being CMOS, it'll be really close to a full 3.3), but it is fully tolerant of 5 (actually up to 7)
18:02.24LyosNorezel2hmmm
18:02.37MonMothathe HC series isn't technically tolerant of 5V when running at 3.3 (though it seems to work just fine)
18:02.59MonMothathe other option would be to use CPLD like a XC9500 series (not the XL)
18:03.24MonMothathey make decent cheap voltage translators, though running all the way up to 5V is getting expensive since everybody just does 3.3 these days
18:04.33LyosNorezel2yeah
18:04.37MonMotha3.3V is a 5V TTL high (>2.7), and when running at 3.3V it'll take 2.7 as a high as well, so the inputs are also 5V TTL compatible (and tolerant up to 7V)
18:04.46MonMothathat's on the VHC series
18:05.13MonMothathe issue with 74 series is that the output high voltage is always going to be the same on both sides unless you do open-drain and use a pull-up
18:05.25ds2what's the diff btwn a VHC and a HCT?
18:05.29MonMothathe PLDs get around that
18:05.46MonMothaHCT is designed for 5V operation only, and is CMOS with TTL compatible thresholds
18:05.55MonMothait isn't specified to run at 3.3V
18:06.13ds2right but for a 3.3V to a 5.0V input, HCT should do the trick nicely
18:06.14MonMothaVHC is specified for I think 2.5-5V operation, and is tolerant up to 7V on the inputs
18:06.30MonMothayes, but then when you reverse the bus to read, you'll be chucking 5V at your FPGA
18:06.32ds2i guess that'd be redundant
18:06.34MonMothathat's very, very bad
18:06.38ds2*nod*
18:07.07MonMothaif you use a VHC at 3.3V, it'll accept 5V signals fine and will output 3.3V, which is a valid logic high for TTL compatible inputs (which I think is what IDE calls for)
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18:07.26ds2oh cool
18:07.31MonMothathen when you reverse it, you'll get 3.3V at your FPGA, so you jsut specify LVCMOS33 as the IO standard for the FPGA pin
18:08.16MonMothafor the non-bidir lines, you could possibly get by without any buffering, but since you'll be driving a cable you may still need a stronger buffer than the FPGA output pin (though some of the Xilinx IOs are pretty strong)
18:08.21MonMothabig capacitive load
18:09.35LyosNorezel2MonMotha: the FPGA I plan on using was specified as being 3.3V PCI I/O complient
18:09.43MonMothawell, you won't be using it in PCI mode
18:09.49MonMothawhat FPGA is it?
18:09.58MonMothaI'm fairly familiar with the Xilinx parts, not so much Altera
18:10.56LyosNorezel2Atmel AT40K40AL
18:11.04MonMothaoh, the Atmel FPGAs
18:11.11MonMothaI actually haven't used them at all
18:11.17LyosNorezel2ah
18:11.32MonMothadoes it have configurable IO standards and drive levels?
18:12.30LyosNorezel2ummm... the datasheet says "• 128 - 384 PCI Compliant I/Os
18:12.30LyosNorezel2– Programmable Output Drive
18:12.30LyosNorezel2– Fast, Flexible Array Access Facilitates Pin Locking
18:12.30LyosNorezel2– Pin-compatible with XC4000, XC5200 FPGAs
18:12.33LyosNorezel2"
18:12.48MonMothawell, I guess it has the latter
18:13.01MonMothayou won't be using the PCI functionality for IDE transfers
18:13.04LyosNorezel2AHAH!
18:13.10LyosNorezel2"• 5V I/O Tolerant"
18:13.13MonMothaoh, well
18:13.17MonMothathat makes things MUCH easier
18:13.49MonMothasince if you output 3.3V, you're compatible with 5V TTL, and if a 5V input won't blow things up, you're good
18:14.03MonMothaif they can put 5V tolerant I/Os on their FPGAs, why can't they do it on AVR? gah
18:14.20LyosNorezel2heh
18:15.35ds2probally cuz 5V tolerantant IO guzzles power
18:16.24MonMothads2: it would be nice to have it as an option on at least some of the I/O heavy parts
18:18.31LyosNorezel2ROFL... Atmel claims a max frequency on that part of 300MHz
18:18.42MonMothadepending on your design, that's quite possible
18:18.54MonMothaI've had Virtex2 designs clocked at 200 before
18:19.04LyosNorezel2heh
18:19.10ds2does that mean I can use that FPGA to make a 300MHz frequency counter?
18:19.13MonMothaheck, I've had 9500XL designs that the fitter said could be clocked at about 150
18:19.21LyosNorezel2ah well... I shouldn't need any more than 133MHz
18:19.49MonMothawell, the actual frequency you can run it at depends on your design
18:20.00MonMothathere's a speed/power/area tradeoff
18:20.12ds2HMmm
18:22.25LyosNorezel2hmmm... if I included a MPEG encoder on the board... would I need to add memory and use a higher clock rate?
18:22.51MonMothayou can probably chuck an MPEG encoder on the FPGA
18:23.06MonMothanow yes, you'll probably need some RAM, but plain ol' SDRAM isn't too hard to talk to
18:23.09MonMothaDDR SDRAM is...
18:23.09LyosNorezel2with only 40k to 50k gates?
18:23.16MonMothaoh, that's a small FPGA
18:23.26MonMothabut you'd be surpried
18:23.51MonMothaand of course, sourcing dedicated MPEG encoder chips in small quantity isn't always easy
18:25.05LyosNorezel2MonMotha: it'll have to act as a motor controller, control a read/record head, and interface to the IDE bus
18:25.51LyosNorezel2and... if no MPEG encoder is used.... it'll also have to do the MPEG encoding...
18:26.02LyosNorezel2will all of that fit in 40k to 50k gates?
18:28.05MonMothayou'd be surprised
18:28.12MonMothait depends on how flexible those 40-50k gates are
18:28.39MonMothayou could always move to a larger FPGA in the same family
18:29.53LyosNorezel2MonMotha: that's the biggest FPGA Atmel has
18:31.16MonMothaoh
18:31.25MonMothaI'm used to my Virtex2 Pro :)
18:31.59LyosNorezel2heh
18:32.14LyosNorezel2is it possible to get free samples of those?
18:32.44ds2if you figure out how, let me know ;)
18:32.50LyosNorezel2heh
18:32.58ds2also, let me know how you mount them
18:33.23MonMothaI grabbed a free Virtex, though it was through an academic program
18:33.26MonMothaand damned if I can solder it down
18:33.31MonMothafreaking BGAs
18:33.44MonMothathe spartan 3E series is still pretty beefy and comes in QFP
18:34.46ds2arm docs are so annoying
18:35.00MonMothaI like my XC2VP30, though.  30k LUTs can do some amazing things
18:36.20LyosNorezel2heh
18:37.36LyosNorezel2umph... without the free samples thing... xilinx is useless
18:37.38MonMothaoh, 30k LUTs and a couple of PowerPCs :)
18:37.54MonMothawell, they're not goign to just up and give you a free sample of some of these things
18:38.03MonMothathe XC2VP30 is about $900 retail in single quantity
18:38.14MonMothaand it's by no means one of their bigger chips
18:38.20LyosNorezel2heh
18:38.37MonMothathe Spartan series is pretty reasonable though
18:38.50MonMothalike $15 for a reasonably large Spartan3E in QFP
18:38.55MonMothathat's single quantity retail
18:39.05LyosNorezel2<<-- broke ;-)
18:39.06MonMothaa board to put it on will cost you more than that
18:40.01ds2just stick w/the CoolRunners ;)
18:41.08MonMothayeah, they're cheap
18:41.14MonMothabut nowhere near as much room as a Spartan3E
18:41.26MonMothathey're CPLDs, after all
18:42.02LyosNorezel2heh
18:43.17MonMothafor simple glue, the 9536XL is really nice.  It's like a $1 in small quantity and has plenty of room to use up all the IOs while still doing useful things
18:48.26LyosNorezel2hmmm
18:48.34LyosNorezel2Actel looks promising
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22:19.16CosmicPenguinGPSFan: winter storm warning huh?
22:19.16CosmicPenguinGPSFan: you west slopers live on the edge!
22:20.10GPSFanCosmicPenguin: that's what they say, it's raining here on & off. 46F
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22:21.05CosmicPenguin54 and thunderstorms here
22:22.28GPSFanif ya don't like the weather, wait a minuit.
22:22.38GPSFansun's out now...
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