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| 06:19.55 | methril|work | yo |
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| 12:24.12 | ja2 | Hi, I conneced to openocd via telnet, but cant halt the target (sam7ex256 dev board). What is missing? |
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| 13:40.42 | ja2 | Ah, finally I got the target to halt. |
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| 19:01.52 | kazaLite | hi all |
| 19:02.53 | kazaLite | on ARM architecture, the usual practice is during system initialization we set up memory for text, bss, heap and stack for all modes. right? |
| 19:03.50 | kazaLite | now here is what i need to be explained to me: |
| 19:04.07 | kazaLite | i have also enabled MMU |
| 19:05.41 | kazaLite | Suppose i have 2 processes running..... and by definition each process has stack, heap, data and text sections. Everything ok so far. right? |
| 19:06.46 | kazaLite | now question is: 1-what is the role of compiler w.r.t. heap,stack,data and text sections? |
| 19:17.23 | roxfan | processes happen much later than system initialization |
| 19:17.30 | roxfan | you're mixing things up |
| 19:18.33 | kazaLite | im not mixing.... im just trying to figure out relationship between different parst making up the system. |
| 19:19.11 | kazaLite | let me put it other way.........during system initialization we mark heap, text, data and stck locations and sizes. |
| 19:19.59 | kazaLite | now what does compiler has to do? does it mark pieces of final machine code to help RTOS to put the "marked" pieces into relevant sections? |
| 19:20.16 | kazaLite | relevant secions == text, data, heap and stack |
| 19:20.21 | kazaLite | am i correct? |
| 19:20.35 | roxfan | compiler makes object files with those sections |
| 19:21.18 | roxfan | usually what happens during linking (or sometimes as an elf post-processor tool) is that all sections are merged into a single binary image |
| 19:21.59 | roxfan | and the startup routine should copy the sections from their place in binary to correct positions in the ram |
| 19:22.27 | kazaLite | startup routine == loader? right? |
| 19:23.22 | roxfan | whatever runs after reset |
| 19:25.41 | kazaLite | and how is stack for user mode handled (once a few processes have started running.)? |
| 19:28.57 | roxfan | are you talking about some rtos? or linux? |
| 19:31.18 | kazaLite | in general.... |
| 19:31.34 | kazaLite | will be cool if you can tell me about some specific os |
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| 19:38.06 | _01000101_ | hey, I want to get an embedded board with 2+ ethernet ports that I can code an OS for. Any recommendations? I'm currently looking at ripping off the RouterOS and using the RB/450G from http://www.routerboard.com/prices.html . |
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| 19:40.41 | roxfan | http://www.embeddedrelated.com/showarticle/59.php |
| 19:43.41 | _01000101_ | I was wonder more from a hardware perspective. I'm fairly sure I can just write a bootloader, slap it on the boot medium (probably flash in this case) and get to work, but I'm not sure what hardware I should buy that is decent. |
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| 19:46.13 | roxfan | _01000101_: that wasn't for you :) |
| 19:46.22 | _01000101_ | oh lol =) |
| 19:47.46 | roxfan | don't know much about ethernet chips |
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| 19:51.38 | new_Dev | Hi All! |
| 19:52.14 | florian | hi new_Dev |
| 19:54.36 | new_Dev | hi florian :) |
| 19:54.53 | new_Dev | i need some help |
| 19:56.12 | new_Dev | i have a clock drift (the system clock is not accurate) |
| 19:56.51 | new_Dev | what can be the reason, if any one have experienced this kind of problem! |
| 19:58.06 | _01000101_ | I know very little about embedded (ARM-based) devices, but the PIT on an x86 is about ~1s in-accurate per day. Newer devices such as the RTC and HPET have compensated for that though. |
| 19:59.33 | new_Dev | thanks |
| 20:01.08 | new_Dev | lol i have a real problem, i am not talking about a drift of 1 second by day, it's maybe 24h per day |
| 20:01.10 | new_Dev | :( |
| 20:01.39 | _01000101_ | are you programming the PIT? what are you using as a timer? |
| 20:02.14 | new_Dev | i am using a timer |
| 20:02.35 | new_Dev | MCU peripheral |
| 20:02.40 | _01000101_ | on the PIT you need to program the frequency using a divisor, maybe your timer has to achieve something similar? |
| 20:03.07 | roxfan | could be wrong pll setup or bad crystal |
| 20:03.10 | new_Dev | yes i programmed my timer to give an interrupt every 10ms |
| 20:03.57 | new_Dev | hmm!! interresting, i will have a look to the pll |
| 20:06.43 | new_Dev | bad luck the pll configuration is ok! |
| 20:08.10 | new_Dev | but there is an interresting feat, when using the system function usleep to insert a delay it's accurate |
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| 20:08.14 | new_Dev | ??? |
| 20:08.38 | _01000101_ | hmm, well since no one really has an opinion about it here, I'll just buy the RB/450G as it has 5GBe ethernet ports and a 680MHz atheros CPU. |
| 20:10.58 | new_Dev | _01000101_ 5GB ethernet? |
| 20:11.12 | _01000101_ | oops, meant 5x 1GBe |
| 20:11.13 | _01000101_ | =) |
| 20:11.44 | new_Dev | :D |
| 20:11.56 | new_Dev | ok i thought that i am also drifting :D |
| 20:12.36 | _01000101_ | heh, I'm developing a switch-like OS and need a board with multiple ethernet ports (preferably gigabit). |
| 20:13.09 | new_Dev | ah, i see! |
| 20:13.15 | new_Dev | good luck! |
| 20:13.31 | roxfan | new_Dev: maybe your handler takes longer than 10ms? or some other process? |
| 20:13.57 | roxfan | there is also some overhead for interrupt entry and exit |
| 20:14.02 | _01000101_ | lol not 10ms worth |
| 20:14.07 | _01000101_ | at least, I'd hope not. =) |
| 20:14.25 | roxfan | try increasing the interval and see if it's more correct? |
| 20:14.55 | new_Dev | ok roxfan i will try! |
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| 20:17.57 | _01000101_ | meh, I want a x86-based board, this Atheros (MIPS-based) has next to no software development docs. |
| 20:18.46 | new_Dev | _01000101_ it can be possible, my NOR FLASH is so slow |
| 20:19.01 | new_Dev | and i ran the kernel in XIP mode |
| 20:19.06 | new_Dev | run* |
| 20:19.15 | kazaLite | new_Dev: im sure you must be aware that its better to start you time calculation from second timer interrupt, as first timer interrupt can occur earlier than expected. |
| 20:19.21 | _01000101_ | lol really? guess I'm just used to 386+ speeds. |
| 20:21.13 | new_Dev | kazaLite timer are precious for my application but can the rtc do the the timer job? |
| 20:23.12 | kazaLite | errrr.... you said rtc... ignore my last msg |
| 20:24.33 | new_Dev | kazaLite, i am not using rtc now, |
| 20:24.53 | new_Dev | a single timer for ticks |
| 20:26.42 | roxfan | _01000101_: here's an arm board with 2x1Gbit http://www.nuhorizons.com/development/marvell/kirkwood_open_rd_client.asp |
| 20:27.08 | kazaLite | are your are pre divider, post drivider, plls are programmed correctly? and are you sure that your clock source is the one that you are supposed to program? like there are might be different clock sources and each has some limitations and you might need to configure some other source? |
| 20:28.02 | roxfan | http://globalscaletechnologies.com/t-openrdcdetails.aspx hmm, even vga |
| 20:28.04 | kazaLite | also look for errata of your clock and development board... |
| 20:29.45 | new_Dev | ok thanks for this precious info i will have a look to the errata to see if there is something related to timers |
| 20:30.04 | kazaLite | also try testing by running your system with only required/minimal things to test your timer... so that its your code only that is mainly under test and no other thing is causing some blockage to cause delays |
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| 20:42.57 | new_Dev | roxfan when having a tick every 1ms the system block in the calibrating delay loop |
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| 21:07.13 | new_Dev | kazaLite running the system with the minimum of feature enabled does not resolve the problem! |
| 21:08.45 | new_Dev | i will reconfigure every thing! |
| 21:08.53 | new_Dev | thanks for you advices |
| 21:08.57 | new_Dev | :) |
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| 21:50.49 | new_Dev | who tried the application XIP? |
| 21:51.02 | new_Dev | with uclinux? |
| 21:51.55 | ds2 | not with uClinux |
| 21:51.56 | solar | XIP is not an app. |
| 21:52.13 | solar | unless they happen to have one |
| 21:52.17 | ds2 | gcc hello.c -o XIP |
| 21:52.23 | ds2 | "oops" :D |
| 21:52.36 | new_Dev | ds2 nice :D |
| 21:52.59 | new_Dev | like KERNEL XIP i talk about application XIP |
| 21:53.08 | ds2 | the ubuntu install is sure stupid |
| 21:53.19 | new_Dev | (execution direct from the flash with out coping text to ram) |
| 21:53.50 | ds2 | if you have a question, please ask it |
| 21:54.25 | ds2 | wish someone would go back to writingproper installer instead the common crap |
| 21:54.41 | new_Dev | i took a look to application XIP, it's possible with linear cramfs |
| 21:55.06 | ds2 | Okay, so far I think that is documented either in the kconfig file or a webpage... go on ;)\ |
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| 21:56.08 | new_Dev | ds2 where it's docummented :p ?? i have not see any think |
| 21:56.11 | new_Dev | ;) |
| 21:56.20 | ds2 | Check the CELF stuff |
| 21:56.52 | ds2 | note that you should have all the requirements as with kernel XIP |
| 21:57.04 | new_Dev | ok the fact is that i took an old patch for linux and i apply it to my port but the result it's an error message |
| 21:57.29 | new_Dev | from the loader unable to alloc mem to mmap the test segment |
| 21:57.29 | ds2 | what port/hardware? |
| 21:57.34 | new_Dev | something like this |
| 21:57.48 | new_Dev | arm cortex-m3 |
| 21:57.53 | new_Dev | stm32 MCU |
| 21:58.09 | ds2 | care to elaborate on the critical details like type of flash, etc? |
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| 21:58.37 | new_Dev | nor flash m29w128f |
| 21:59.17 | ds2 | and that is accessible by the MTD driver? |
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| 21:59.27 | new_Dev | yes |
| 21:59.44 | ds2 | is your cramfs mounted with the right options so it knows the underlying address? |
| 21:59.46 | new_Dev | i acctually have a jffs2 partition on this nor flash |
| 22:00.03 | ds2 | JFFS2 will not do XIP, AFAIK |
| 22:00.12 | new_Dev | yes i kno |
| 22:00.14 | new_Dev | w |
| 22:00.18 | ds2 | and is your executable tagged appropriately? |
| 22:00.22 | new_Dev | i have another fs |
| 22:00.25 | new_Dev | a cramfs |
| 22:00.43 | new_Dev | make with the -x parameter for xip and sh have the +t mode |
| 22:01.02 | new_Dev | tagged? what do you mean by tagged? |
| 22:01.05 | ds2 | Hmmmm which tool did you build it with? fstool or mkfs? |
| 22:01.13 | ds2 | tagged as in the mode 1xxx |
| 22:01.18 | new_Dev | (sorry english is little bit foreign for me) |
| 22:01.24 | ds2 | aka sticky bit set |
| 22:01.51 | new_Dev | the tool is the mkcramfs tool |
| 22:02.29 | ds2 | that sounds like you did everything right |
| 22:02.38 | ds2 | how do you know it is not working? |
| 22:03.14 | new_Dev | amount of memory used |
| 22:03.31 | ds2 | what did you look at to determine that? |
| 22:03.38 | new_Dev | proc/pid/maps |
| 22:04.03 | new_Dev | nothing change it's like running the file from the jffs2 |
| 22:04.15 | new_Dev | without xip |
| 22:04.37 | ds2 | I don't think that will necessarily change but then you are on uClinux |
| 22:05.05 | new_Dev | what? |
| 22:05.07 | ds2 | wonder if it is unhappy with not being able to do fixups.... did you compile with PIC? |
| 22:05.23 | new_Dev | yes -fpic |
| 22:05.36 | ds2 | what file format are you using? FLT or ELF? |
| 22:05.52 | new_Dev | flt |
| 22:05.57 | new_Dev | flat forma |
| 22:06.07 | ds2 | so that is one big thing that is different |
| 22:06.21 | ds2 | I'd verify that the FLT format can work with XIP first |
| 22:07.12 | new_Dev | :s shame i did not verify this before! |
| 22:07.43 | ds2 | the FLT format is missing some things... I think stuff like shlibs won't work with FLT |
| 22:08.02 | ds2 | it is possible the elf2flt thing undid the PIC stuff |
| 22:08.51 | new_Dev | how to verify this? |
| 22:10.05 | ds2 | sorry, donno... a more toolchain aware person might know |
| 22:10.50 | new_Dev | ok! thanks ;) |
| 22:11.07 | new_Dev | i have a tones of questions :D |
| 22:11.40 | new_Dev | i hope to catch linus :D |
| 22:11.59 | ds2 | he might prefer otherwise |
| 22:12.09 | new_Dev | hihi |
| 22:12.30 | new_Dev | i think so too |
| 22:13.54 | new_Dev | someone from MontaVista for some questions :)))) |
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