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| 17:15.21 | gandhijee | hey, if i have a device on the smbus who's ID is 6E, do i need to bit shift that value to get its real SMbus addr? |
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| 17:24.57 | bsdfox | gandhijee: often the address is set with a couple pins on the device |
| 17:25.19 | bsdfox | like DEVID for the top 4-5 bits and the pins set the bottom 2-3 bits |
| 17:25.29 | bsdfox | 7 bit address and the LSB indicated R/W |
| 17:26.08 | gandhijee | bsdfox: yeah, i have a device that is on 6E |
| 17:26.39 | gandhijee | but to access it in linux with the i2c stuff, i had to shift it over 0x63 >> 1; |
| 17:26.51 | gandhijee | i guess i am wondering if thats normal |
| 17:27.20 | bsdfox | gandhijee: I think you need to left shift it once because you send the 8th bit for R/W |
| 17:27.39 | bsdfox | so you should be sending 1101110x |
| 17:28.06 | gandhijee | hmm i wonder if thats why the GPIO is getting stuck in a state some time |
| 17:29.06 | bsdfox | seems like maybe a fluke if it was working when you shifted it right |
| 17:30.25 | gandhijee | i don't think so |
| 17:30.41 | gandhijee | i used i2cget and the address that the right shift produced |
| 17:30.43 | gandhijee | and it workeed |
| 17:31.07 | bsdfox | maybe smbus is different than i2c |
| 17:31.25 | bsdfox | I've never worked with it but I thought they were basically the same protocol |
| 17:31.34 | gandhijee | yeah they are |
| 17:31.39 | gandhijee | and left shit does't seem to work |
| 17:32.28 | bsdfox | gandhijee: I guess that |
| 17:32.32 | bsdfox | 'd depend how you're handling it |
| 17:32.51 | bsdfox | I was doing ADDR+RW so I had to shift ADDR left once |
| 17:32.59 | bsdfox | if you are writing ADDR then writing RW you wouldn't have to |
| 17:33.00 | gandhijee | i guess i am doing it the silly way?? |
| 17:33.06 | gandhijee | just 6E << 1 |
| 17:33.23 | prpplague | gandhijee: please try to refrain from using foul language here, the channel is used by many professionals at work, we don't want the channel to be blocked |
| 17:33.33 | gandhijee | i thought the i2c/smbus handlers would take care of that |
| 17:33.37 | bsdfox | prpplague: pretty sure that was a typo :) |
| 17:33.45 | gandhijee | whoops |
| 17:33.53 | gandhijee | i missed the F |
| 17:33.54 | gandhijee | sorry |
| 17:34.11 | bsdfox | gandhijee: yeah I'm not sure. I've just bit banged it mostly |
| 17:34.17 | prpplague | ahh indeed it was |
| 17:34.23 | prpplague | didn't read the context |
| 17:34.34 | Mirell | Good Jorb, prpplague. |
| 17:34.43 | prpplague | hehe |
| 17:35.03 | gandhijee | anyone else have any insight on this by any chance? |
| 17:35.08 | Mirell | prpplague just went, "Fuuuuuuuuuuuuuuuuuuuuuuuuuuuuuuuuu....." |
| 17:35.30 | prpplague | Mirell: hehe |
| 17:35.40 | bsdfox | gandhijee: you tried it without shifting at all? |
| 17:35.50 | gandhijee | yeah |
| 17:37.02 | bsdfox | I'd think you either need to not shift it (it sends the 7addr bits then the rw bit alone) or left shift it once then add the rw bit before the data is sent |
| 17:37.17 | bsdfox | don't think I can help much past that |
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| 17:38.20 | prpplague | pat_: greetings |
| 17:38.41 | prpplague | ~seen gpsfan |
| 17:38.43 | purl | gpsfan <~kenm@64.92.145.112> was last seen on IRC in channel #edev, 75d 20h 20m 47s ago, saying: 'oops, and now it's snowing (again)'. |
| 17:39.12 | prpplague | wonders where gpsfan has been |
| 17:39.37 | prpplague | T0mW: ping |
| 17:40.09 | gandhijee | hmm |
| 17:40.23 | Mirell | sighs at divering code bases.. |
| 17:42.17 | Mirell | Diverging, rather. |
| 17:44.11 | penguinece | famous last words, it seems. |
| 17:44.53 | Mirell | DIVERING CODE BASES SUCK! |
| 17:44.59 | Mirell | jumps off a bridge |
| 17:45.19 | penguinece | well, I was referring to gpsfan but... DONT DO IT |
| 17:45.44 | Mirell | Hehe. |
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| 17:57.37 | landley | I'm trying to merge the two busybox netcat implementations. |
| 17:57.53 | prpplague | loves the idea of netcat |
| 17:58.01 | prpplague | landley: there have been too many variations |
| 17:58.09 | landley | You'd think busybox would know better... |
| 17:58.14 | prpplague | landley: indeed |
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| 18:01.36 | prpplague | wow massive netsplit |
| 18:01.36 | landley | yup |
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| 18:04.15 | landley | Welcome back. :) |
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| 18:08.34 | *** topic/#edev is Discussion of embedded systems (Hardware/Software/Linux/WinCE/Commercial Device Repurposing) : Aboriginal Linux (formerly FWL) : Busybox and Buildroot : http://www.elinux.org |
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| 18:58.25 | T0mW | prpplague: pong |
| 18:58.36 | T0mW | prpplague: been spackling :-( |
| 18:58.45 | prpplague | T0mW: hey |
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| 18:59.16 | prpplague | T0mW: question, have you looked at the GPMC controller on the omap3530 (the same chip on the beagle) |
| 18:59.25 | T0mW | prpplague: no |
| 19:00.11 | prpplague | T0mW: i've been experimenting using it to do an IDE interface |
| 19:00.59 | prpplague | T0mW: you are the only person i know that has done some IDE hacking |
| 19:01.17 | T0mW | lol |
| 19:01.40 | T0mW | IDE is just a bunch of I/O ports. |
| 19:02.16 | T0mW | prpplague: you don't need interrupts or DMA to do IDE |
| 19:02.34 | prpplague | T0mW: thats what i thought |
| 19:02.47 | prpplague | T0mW: i have 16-bit data i/o |
| 19:02.50 | T0mW | prpplague: the TuxScreen was polled io |
| 19:03.07 | prpplague | T0mW: i was mainly concerned with the proper address lines |
| 19:03.09 | T0mW | prpplague: only register that is 16 bit is the data reg |
| 19:03.42 | prpplague | T0mW: the 16-bit data i/o is 16-bit aligned so i don't have the lower 8-bit address line |
| 19:03.42 | T0mW | prpplague: although, by the IDE spec, a drive should be able to be commanded to go into an 8 bit data interface mode... |
| 19:05.04 | T0mW | prpplague: ah, yeah, if your bus is 16bit, then a write to all 16bits at once, rather than a successive writing of 2 bytes, would not work. |
| 19:05.08 | T0mW | prpplague: but |
| 19:05.34 | T0mW | prpplague: what you can do is to use 16 address locations instead of 8 to access the IDE... |
| 19:05.59 | CosmicPenguin | So today is a bad day to be anti-software patent, isn't it? |
| 19:06.13 | prpplague | CosmicPenguin: it is? |
| 19:07.10 | prpplague | T0mW: well the databus is 16-bit which i can align with the IDE, but i only have access to A[3:1] but not A[0] |
| 19:07.23 | T0mW | prpplague: correct |
| 19:08.01 | prpplague | T0mW: so if i understand you correctly |
| 19:08.03 | T0mW | prpplague: so, first reg is at 0 (which is the data reg), next reg is at 2, next at 4, next at 6, ... |
| 19:08.23 | T0mW | prpplague: instead of at: 0, 1, 2, 3, ... |
| 19:08.57 | prpplague | T0mW: ahh, so i would connect from the CPU side A[1] to ide side A[0] which would cause the offset |
| 19:09.03 | prpplague | T0mW: and so on |
| 19:09.36 | prpplague | T0mW: i think i follow |
| 19:10.52 | T0mW | prpplague: yeah, the upper 8 bits of the 16bit word is ignored by the IDE interface as only the 8 bit register you are addressing get affected. |
| 19:11.48 | T0mW | prpplague: by definition: there is only one 16 bit register (data), all else is 8 bit. |
| 19:11.56 | prpplague | T0mW: gotcha |
| 19:12.05 | prpplague | wmat: ping |
| 19:12.09 | T0mW | prpplague: ok, now go play, heehee |
| 19:12.14 | prpplague | T0mW: hey |
| 19:12.19 | prpplague | T0mW: one last thing |
| 19:12.22 | T0mW | k |
| 19:12.38 | prpplague | T0mW: if i wanted you to tinker around with this, you ok with a NDA ? |
| 19:12.50 | T0mW | prpplague: btdt, np |
| 19:13.07 | prpplague | T0mW: this wouldn't be for $$, but for some cool hardware |
| 19:13.17 | T0mW | prpplague: got a folder in the filing cabinet for such things. |
| 19:13.27 | prpplague | T0mW: hehe |
| 19:13.34 | prpplague | T0mW: thanks for the info |
| 19:13.44 | T0mW | prpplague: I'm interested, I've got a board to bring up this week, after that... |
| 19:13.56 | prpplague | T0mW: this would be probably later in the fall |
| 19:17.53 | T0mW | prpplague: ok, time for me to do more spackle.. :P |
| 19:18.48 | prpplague | T0mW: later |
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| 19:32.10 | gratz|home | hmm |
| 19:35.13 | roxfan | mmh |
| 19:37.06 | prpplague | nni |
| 19:39.33 | penguinece | hal |
| 19:39.33 | penguinece | ibm |
| 19:39.35 | penguinece | omg! |
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