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| 01:38.54 | gkwhc | hmm i feel lost. i disabled hardware interrupts on critical sections such as ISR and DMA control, but the code always falls out after executing the ISR. i am not sure where else to place the global variable to further debug the code |
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| 02:04.25 | landley | gkwhc: some variant of page fault? |
| 02:04.34 | landley | So it's executing the ISR and not returning from it properly? |
| 02:04.49 | landley | Are you pushing more crap onto the stack than you're popping, maybe? |
| 02:05.26 | landley | It executes an interrupt service routine, and then returns to... the idle loop? |
| 02:06.36 | gkwhc | its returning properly, but to the idle loop |
| 02:09.46 | landley | pop the return value from the stack, display it, and push it back? |
| 02:09.55 | landley | Or trigger the debugger at that point. |
| 02:10.39 | landley | Possibly whatever's setting up the ISR is crap that assumes any task a DSP does can be interrupted and not resumed, so jumping back to the idle loop is hardcoded. |
| 02:10.46 | landley | This is an embedded OS after all... |
| 02:10.53 | landley | I'm kind of surprised it has interrupt support. |
| 02:13.18 | gkwhc | hmm |
| 02:13.46 | gkwhc | do embedded OS usually not have interrupt support? |
| 02:14.39 | landley | I've used a few that didn't. |
| 02:14.43 | landley | the DSP in question didn't have interrupts. |
| 02:14.56 | landley | The central loop was using the CPU counter to figure out when to run the next thing. |
| 02:16.03 | landley | it's possible the interrupt support is just a jump to a fixed address and doesn't save anything on a stack, so the return is a jump to a fixed address. |
| 02:16.17 | landley | Dunno the processor. |
| 02:16.25 | landley | Look up what it's supposed to do? |
| 02:18.24 | gkwhc | yeah thats what Im doing now |
| 02:31.24 | roxfan | whoa http://www.forbes.com/sites/jeanbaptiste/2013/10/29/exclusive-intel-opens-fabs-to-arm-chips/ |
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