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| 21:01.26 | L29Ah | https://www.cnx-software.com/2021/04/13/allwinner-d1-linux-risc-v-sbc-processor/ |
| 23:48.46 | m4t | nifty |
| 23:50.11 | m4t | i'm working with a p2041rdb. it boots from NOR by default. i'd like to move RCW/PBL to exclusively sd card. i'm working with the QCVS eclipse plugin to modify the RCW that came w/the latest qoriq sdk (2.0) |
| 23:50.41 | m4t | so i modifed PBI_SRC to eSDHC and BOOT_LOC to memory complex 1 |
| 23:51.28 | m4t | looking at some oldish docs, they say to embed the u-boot payload with a load address of 0xf80000 into the 'PBI Data' as an 'ACS Write' |
| 23:52.09 | m4t | which i did. and it adds all the commands to write the data to sram. what i'm not clear on is 1.) will it immediately start execution @ f80000 when PBL is done being executed? |
| 23:52.55 | m4t | 2. the u-boot.bin they provide is something like 800KB, but at least the hex view there shows it starting to wrap back to 0x0 after 0xFFFFFFF |
| 23:53.22 | m4t | i guess memory accesses to that region would overflow too, so it can execute even with the limited (S)RAM region its been copied to? |
| 23:54.10 | m4t | anyways, i guess i'll find out soon if it works.i need to toggle dip switches on the board to select sd card as the RCW source |
| 23:54.34 | m4t | uhm, i guess an alternative would be to try to make a smaller u-boot |